Pre-charge optimization in Sidewall Spacer Memory Bit Cell with respect to Total Ionizing Dose

Tommaso Vincenzi; Gregor Schatzberger; Alicja Malgorzata Michalowska-Forsyth

Pre-charge optimization in Sidewall Spacer Memory Bit Cell with respect to Total Ionizing Dose

Tommaso Vincenzi^*
, Gregor Schatzberger
, Alicja Malgorzata Michalowska-Forsyth

^*Corresponding author for this work

Institute of Electronics (4390)

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper analyses a charge-based Non-Volatile Memory device: the Sidewall Spacer. Multiple test-dies from a 55nm standard CMOS process are tested up to 500krad assessing data retention depending on charge injection in the nitride spacer.

Original language	English
Number of pages	5
Publication status	Published - Nov 2020
Event	2020 Nuclear & Space Radiation Effects Conference - Virtuell Duration: 1 Dec 2020 → 8 Dec 2020 http://www.nsrec.com/

Conference

Conference	2020 Nuclear & Space Radiation Effects Conference
Abbreviated title	NSREC 2020
City	Virtuell
Period	1/12/20 → 8/12/20
Internet address	http://www.nsrec.com/

Keywords

flash memory
Nonvolatile Memories
radiation effects
Total Ionizing Dose
x-ray
charge based

Cite this

@conference{e0550b5424374a11bf7428742383ccb0,

title = "Pre-charge optimization in Sidewall Spacer Memory Bit Cell with respect to Total Ionizing Dose",

abstract = "This paper analyses a charge-based Non-Volatile Memory device: the Sidewall Spacer. Multiple test-dies from a 55nm standard CMOS process are tested up to 500krad assessing data retention depending on charge injection in the nitride spacer.",

keywords = "flash memory, Nonvolatile Memories, radiation effects, Total Ionizing Dose, x-ray, charge based",

author = "Tommaso Vincenzi and Gregor Schatzberger and Michalowska-Forsyth, \{Alicja Malgorzata\}",

year = "2020",

month = nov,

language = "English",

note = "2020 Nuclear \& Space Radiation Effects Conference, NSREC 2020 ; Conference date: 01-12-2020 Through 08-12-2020",

url = "http://www.nsrec.com/",

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TY - CONF

T1 - Pre-charge optimization in Sidewall Spacer Memory Bit Cell with respect to Total Ionizing Dose

AU - Vincenzi, Tommaso

AU - Schatzberger, Gregor

AU - Michalowska-Forsyth, Alicja Malgorzata

PY - 2020/11

Y1 - 2020/11

N2 - This paper analyses a charge-based Non-Volatile Memory device: the Sidewall Spacer. Multiple test-dies from a 55nm standard CMOS process are tested up to 500krad assessing data retention depending on charge injection in the nitride spacer.

AB - This paper analyses a charge-based Non-Volatile Memory device: the Sidewall Spacer. Multiple test-dies from a 55nm standard CMOS process are tested up to 500krad assessing data retention depending on charge injection in the nitride spacer.

KW - flash memory

KW - Nonvolatile Memories

KW - radiation effects

KW - Total Ionizing Dose

KW - x-ray

KW - charge based

M3 - Paper

T2 - 2020 Nuclear & Space Radiation Effects Conference

Y2 - 1 December 2020 through 8 December 2020

ER -

Pre-charge optimization in Sidewall Spacer Memory Bit Cell with respect to Total Ionizing Dose

Abstract

Conference

Keywords

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Cite this