Illustration Of Automatic Digital Synthesis For Camellia-128 Cipher Algorithm

Advances in the integrated circuit (IC) industry have enabled the integration of millions of transistors on a single chip. In these circumstances the task of the circuit designer is ever more demanding. Recent trends in CAD tools target the complete automation of the digital design flow. This article illustrates the automatic synthesis of a digital system which implements a cipher
algorithm. The Camellia-128 cipher was chosen for implementation due to its potential performance in terms of IC area, processing speed and power consumption. The digital IC is automatically synthesized up to layout level with no human intervention