Projects per year
| Original language | English |
|---|---|
| Title of host publication | 2010 IEEE 13th International Symposium on Design and Diagnostics of Electronic Circuits and Systems |
| Publisher | . |
| Pages | 370-375 |
| DOIs | |
| Publication status | Published - 2010 |
| Event | 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems: DDECS 2010 - Wien, Austria Duration: 14 Apr 2010 → 16 Apr 2010 |
Conference
| Conference | 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems |
|---|---|
| Country/Territory | Austria |
| City | Wien |
| Period | 14/04/10 → 16/04/10 |
Treatment code (Nähere Zuordnung)
- Theoretical
Projects
- 1 Finished
-
JUDY - Integrated Jitter Measurement: A Concept Study for High-Speed Clock Systems
Söser, P. (Project manager), Pribyl, W. (Project manager) & Erb, S. (Attendee / Assistant)
1/10/09 → 31/05/11
Project: Research project