Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention

Patrick Schrey

doi:10.1109/EMCCompo.2019.8919921

Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention

Patrick Schrey

Institut für Elektronik (4390)

Publikation: Beitrag in Buch/Bericht/Konferenzband › Beitrag in einem Konferenzband › Begutachtung

Abstract

Electrostatic Discharge immunity is a design challenge for electronic components and systems alike. Unfortunately, component-level Electrostatic Discharge data seldom provides useful information for system design. In order to pick a suitable component to meet the system's Electrostatic Discharge requirements, a more sophisticated characterisation of components with respect to Electrostatic Discharge has to be found. In particular, soft-failures in component-level Electrostatic Discharge testing are required. This paper presents a new soft-failure Electrostatic Discharge characterisation to help system designers.

Originalsprache	englisch
Titel	2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)
Herausgeber (Verlag)	IEEE Xplore
Seitenumfang	3
DOIs	https://doi.org/10.1109/EMCCompo.2019.8919921
Publikationsstatus	Veröffentlicht - 21 Okt. 2019
Veranstaltung	The 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits - Zhejiang University, Haining, China Dauer: 21 Okt. 2019 → 23 Okt. 2019 http://www.emcconf.org/

Konferenz

Konferenz	The 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits
Kurztitel	EMC Compo
Land/Gebiet	China
Ort	Haining
Zeitraum	21/10/19 → 23/10/19
Internetadresse	http://www.emcconf.org/

Zugriff auf Dokument

10.1109/EMCCompo.2019.8919921

Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention
Schrey, P. (Redner/in)
22 Okt. 2019
Aktivität: Vortrag oder Präsentation › Vortrag bei Konferenz oder Fachtagung › Science to science
The 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits
Schrey, P. (Teilnehmer/-in)
21 Okt. 2019 → 23 Okt. 2019
Aktivität: Teilnahme an / Organisation von › Konferenz oder Fachtagung (Teilnahme an/Organisation von)

Dieses zitieren

Schrey, P 2019, Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention. in 2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo). IEEE Xplore, The 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, Haining, China, 21/10/19. https://doi.org/10.1109/EMCCompo.2019.8919921

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abstract = "Electrostatic Discharge immunity is a design challenge for electronic components and systems alike. Unfortunately, component-level Electrostatic Discharge data seldom provides useful information for system design. In order to pick a suitable component to meet the system's Electrostatic Discharge requirements, a more sophisticated characterisation of components with respect to Electrostatic Discharge has to be found. In particular, soft-failures in component-level Electrostatic Discharge testing are required. This paper presents a new soft-failure Electrostatic Discharge characterisation to help system designers.",

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AB - Electrostatic Discharge immunity is a design challenge for electronic components and systems alike. Unfortunately, component-level Electrostatic Discharge data seldom provides useful information for system design. In order to pick a suitable component to meet the system's Electrostatic Discharge requirements, a more sophisticated characterisation of components with respect to Electrostatic Discharge has to be found. In particular, soft-failures in component-level Electrostatic Discharge testing are required. This paper presents a new soft-failure Electrostatic Discharge characterisation to help system designers.

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BT - 2019 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo)

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Y2 - 21 October 2019 through 23 October 2019

ER -

Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention

Abstract

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Soft-Failures in Component-Level ESD Testing on the Example of Flip-Flop Data Retention

The 12th International Workshop on the Electromagnetic Compatibility of Integrated Circuits

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