Monitoring of parameter stability of SiC MOSFETs in real application tests

Reliability testing of Si power semiconductors has had a long history and has resulted in a good predictability of standard degradation-mechanism tests such as power cycling. To enable a rapid adoption of SiC MOSFETs into the mass market, application stress tests have also been carried out. In order to validate robustness, and assess end-of-life behavior, it is necessary to monitor performance-relevant device parameters throughout the tests. Application stress tests, however, are notorious for imposing limitations on the type of measurements that can be integrated into the test. Here, a modular system for parallel application stress tests is presented. This work also investigates how well one can carry out characterization measurements directly on the application test board. A discussion on the challenges and reasons for the selected solution are presented. The last part of this article presents the results of a bias-temperature instability investigation to demonstrate the feasibility of the proposed solution.